Electro-Thermal Analysis of Quantum Dot Light-Emitting Diode as Pixel Areas Using Thermoreflectance Microscopy
Abstract
Quantum dot light-emitting diodes (QD-LEDs) have emerged as a promising device for next-generation displays. Electrical, optical, and thermal properties depend not only on the material properties of the QDs but also on the device area of QD-LEDs. Thermoreflectance microscopy (TRM) was employed to understand self-heating effect (SHE) depending on geometry of QD-LED quantitatively. These results will provide the foundation for utilizing QD-LED by resolving reliability issues with thermal aging as a next-generation display device. [Link to Journal website (IEEE)]
Impact of Post-Annealing on Electrical Characteristics of Vertical CAA FETs
Abstract
In this study, we systematically investigated the stability of amorphous indium gallium zinc oxide (α-IGZO) vertical channel all-around (CAA) field-effect transistors (FETs) before and after post-annealing. By varying the annealing temperature and time, the optimal condition was identified based on the threshold voltage (VTH) and on-state current (Ion), resulting in improved transfer characteristics. Post-annealing also alleviated short-channel effects, as shown by suppressed drain-induced barrier lowering (DIBL) and reduced current crowding. Under positive bias temperature stress (PBTS), ΔVTH decreased from 1.55 V to 0.2 V, confirming enhanced stability. These results demonstrate that optimized post-annealing effectively improves both electrical performance and reliability of α-IGZO vertical CAA FETs, supporting their application in high-density memory and advanced electronics. [Link to Journal website (IEEE)]
First Demonstration of Computing-in-Memory cell based on 1T-1MFMIS FeFET Featuring 2.3 V Large MW and Multi-bit Retention > 10 years
Abstract
Computing-in-Memory (CiM) is a promising solution to the von Neumann “memory wall,” yet its realization has been limited by the narrow memory windows (MWs) of conventional devices, restricting reliable multi-level operation. In this work, we present the first demonstration of a CiM cell based on a 1T–1MFMIS FeFET structure, where an AOS FET is employed as the write transistor and an MFMIS FeFET serves as the read transistor. By engineering the area ratio between the a-IGZO channel and ferroelectric capacitor, we achieve a wide MW of 2.3 V, enabling robust multi-level program/erase operation. The device further exhibits endurance beyond 10⁸ cycles, extrapolated retention over 10 years, and stable multi-bit states for over 1000 seconds. These results overcome longstanding erase and MW challenges in oxide-semiconductor FeFETs and highlight the potential of 1T–1MFMIS FeFETs for next-generation CiM applications. [Link to Journal website (IEEE)]
Congratulations, Yongjin, Zewei, Simin!